# Copyright 2018 Tymoteusz Blazejczyk
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.

set_global_assignment -name TOP_LEVEL_ENTITY @ARG_TOP_LEVEL_ENTITY@
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
set_global_assignment -name NUM_PARALLEL_PROCESSORS @ARG_NUM_PARALLEL_PROCESSORS@
set_global_assignment -name LAST_QUARTUS_VERSION "@QUARTUS_VERSION@ @QUARTUS_EDITION@ Edition"

@quartus_assignments@
@quartus_ip_search_paths_assignment@
